While GPU shortages dominate the AI hardware conversation, 2026 is shaping up to be the year the networking layer becomes the real constraint. AI data center networking — Ethernet switches, optical interconnects, DSPs, and custom networking ASICs — is seeing demand grow as fast as compute itself.
1.6Tbps switches are here
This year marks the first volume deployments of 1.6Tbps switches, and the ramp is moving faster than the previous 800Gbps generation did — port counts are projected to surpass 5 million within one to two years as hyperscalers rebuild network fabric around larger AI clusters.
Scale-up, scale-out, scale-across
Marvell's guidance points to interconnect business growth of more than 70% year-over-year in fiscal 2027, driven by scale-out PAM DSP ramp-ups alongside newer scale-up and scale-across networking demand — the different tiers of connectivity that link GPUs within a rack, across racks, and across data centers.
The physical layer keeps evolving too
Researchers are also pushing beyond conventional packaging: bumpless chip interconnection techniques have demonstrated up to 16x greater aggregate signal bandwidth within the same interconnect area, a preview of how tightly packed AI accelerator packages may get.
Why we're tracking this
Every layer of this stack — from board-level power delivery to signal integrity at multi-hundred-Gbps lane speeds — depends on discrete semiconductors that can keep up. It's a good environment for engineering teams to be specifying components with real margin, not minimums.
Source: EDN Asia — SEMICON Taiwan 2026, Yahoo Finance — Networking Semiconductor Stocks